Adam Joseph a79bbad03b docs(tvix/eval): add "intern literals" to future optimisations ... Signed-off-by: Adam Joseph <adam@westernsemico.com> Change-Id: I460230863de853ca5248733bc977d4780b216f36 Reviewed-on: https://cl.tvl.fyi/c/depot/+/7096 Tested-by: BuildkiteCI Reviewed-by: sterni <sternenseemann@systemli.org>		2022-10-28 02:57:23 +00:00
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builtins.md	docs(tvix/eval): pad pure column so it can fit "false"	2022-09-04 21:05:57 +00:00
known-optimisation-potential.md	docs(tvix/eval): add "intern literals" to future optimisations	2022-10-28 02:57:23 +00:00
language-issues.md	fix(tvix/eval): bring foldl' strictness in line with C++ Nix	2022-10-15 14:12:23 +00:00
opcodes-attrsets.md	docs(tvix/eval): add design documentation for attrset opcodes	2022-08-13 15:31:50 +00:00
recursive-attrs.md	docs(tvix/eval): note C++ implementation details for C++ Nix	2022-09-18 15:01:34 +00:00